%0 Journal Article %1 journals/jssc/WongCL03 %A Wong, Joseph M. C. %A Cheung, Vincent S. L. %A Luong, Howard C. %D 2003 %J IEEE J. Solid State Circuits %K dblp %N 10 %P 1643-1648 %T A 1-V 2.5-mW 5.2-GHz frequency divider in a 0.35-μm CMOS process. %U http://dblp.uni-trier.de/db/journals/jssc/jssc38.html#WongCL03 %V 38

@article{journals/jssc/WongCL03, added-at = {2022-06-23T00:00:00.000+0200}, author = {Wong, Joseph M. C. and Cheung, Vincent S. L. and Luong, Howard C.}, biburl = {https://www.bibsonomy.org/bibtex/294f951960ef1773683ca3c499ad9b1aa/dblp}, ee = {https://doi.org/10.1109/JSSC.2003.817261}, interhash = {4e022a1dbcfcdae11ccfbd0114a33689}, intrahash = {94f951960ef1773683ca3c499ad9b1aa}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 10, pages = {1643-1648}, timestamp = {2024-04-08T10:43:12.000+0200}, title = {A 1-V 2.5-mW 5.2-GHz frequency divider in a 0.35-μm CMOS process.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc38.html#WongCL03}, volume = 38, year = 2003 }