%0 Journal Article %1 journals/tcad/TakasakiSNKO87 %A Takasaki, Shigeru %A Sasaki, Tohru %A Nomizu, Nobuyoshi %A Koike, Nobuhiko %A Ohmori, Kenji %D 1987 %J IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. %K dblp %N 1 %P 46-54 %T Block-Level Hardware Logic Simulation Machine. %U http://dblp.uni-trier.de/db/journals/tcad/tcad6.html#TakasakiSNKO87 %V 6

@article{journals/tcad/TakasakiSNKO87, added-at = {2020-09-24T00:00:00.000+0200}, author = {Takasaki, Shigeru and Sasaki, Tohru and Nomizu, Nobuyoshi and Koike, Nobuhiko and Ohmori, Kenji}, biburl = {https://www.bibsonomy.org/bibtex/2317399de22afd4398c70810170df73b3/dblp}, ee = {https://doi.org/10.1109/TCAD.1987.1270245}, interhash = {541b1357d7f4feee004ab62d7cdd21aa}, intrahash = {317399de22afd4398c70810170df73b3}, journal = {IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.}, keywords = {dblp}, number = 1, pages = {46-54}, timestamp = {2020-09-25T11:44:31.000+0200}, title = {Block-Level Hardware Logic Simulation Machine.}, url = {http://dblp.uni-trier.de/db/journals/tcad/tcad6.html#TakasakiSNKO87}, volume = 6, year = 1987 }