Please log in to take part in the discussion (add own reviews or comments).
Cite this publication
More citation styles
- please select -
%0 Conference Paper
%1 ChaCul17Hardware
%A Chang, Andre Xian Ming
%A Culurciello, Eugenio
%B Circuits and Systems (ISCAS), 2017 IEEE International Symposium on
%D 2017
%K FPGA LSTM architecture deep_learning embedded
%P 1--4
%T Hardware accelerators for recurrent neural networks on FPGA
%U https://ieeexplore.ieee.org/abstract/document/8050816/
@inproceedings{ChaCul17Hardware,
added-at = {2018-08-15T09:00:40.000+0200},
author = {Chang, Andre Xian Ming and Culurciello, Eugenio},
biburl = {https://www.bibsonomy.org/bibtex/2c3048df94b43faa7942de6448167d535/loroch},
booktitle = {Circuits and Systems (ISCAS), 2017 IEEE International Symposium on},
interhash = {6b75cde39b7fdeaeaa97b5435c7b34c6},
intrahash = {c3048df94b43faa7942de6448167d535},
keywords = {FPGA LSTM architecture deep_learning embedded},
organization = {IEEE},
pages = {1--4},
timestamp = {2018-08-15T09:00:40.000+0200},
title = {Hardware accelerators for recurrent neural networks on FPGA},
url = {https://ieeexplore.ieee.org/abstract/document/8050816/},
year = 2017
}