%0 Journal Article %1 journals/mam/StevenCCPS97 %A Steven, Gordon B. %A Christianson, Bruce %A Collins, Roger %A Potter, Richard D. %A Steven, Fleur L. %D 1997 %J Microprocess. Microsystems %K dblp %N 7 %P 391-400 %T A superscalar architecture to exploit instruction level parallelism. %U http://dblp.uni-trier.de/db/journals/mam/mam20.html#StevenCCPS97 %V 20

@article{journals/mam/StevenCCPS97, added-at = {2020-09-05T00:00:00.000+0200}, author = {Steven, Gordon B. and Christianson, Bruce and Collins, Roger and Potter, Richard D. and Steven, Fleur L.}, biburl = {https://www.bibsonomy.org/bibtex/29f12149a0ecb269e54579c8c88d56e80/dblp}, ee = {https://doi.org/10.1016/S0141-9331(96)01101-5}, interhash = {8cc0a2bc5ef3c4f9aaa4b83d26c9aaf6}, intrahash = {9f12149a0ecb269e54579c8c88d56e80}, journal = {Microprocess. Microsystems}, keywords = {dblp}, number = 7, pages = {391-400}, timestamp = {2020-09-09T12:23:52.000+0200}, title = {A superscalar architecture to exploit instruction level parallelism.}, url = {http://dblp.uni-trier.de/db/journals/mam/mam20.html#StevenCCPS97}, volume = 20, year = 1997 }