%0 Journal Article %1 journals/jssc/ZeydelBO10 %A Zeydel, Bart R. %A Baran, Dursun %A Oklobdzija, Vojin G. %D 2010 %J IEEE J. Solid State Circuits %K dblp %N 6 %P 1220-1233 %T Energy-Efficient Design Methodologies: High-Performance VLSI Adders. %U http://dblp.uni-trier.de/db/journals/jssc/jssc45.html#ZeydelBO10 %V 45

@article{journals/jssc/ZeydelBO10, added-at = {2023-11-12T00:00:00.000+0100}, author = {Zeydel, Bart R. and Baran, Dursun and Oklobdzija, Vojin G.}, biburl = {https://www.bibsonomy.org/bibtex/2bdb52c9c987ebc844885881dbb800635/dblp}, ee = {https://doi.org/10.1109/JSSC.2010.2048730}, interhash = {983e42f359f1d9cfe9a7b4d465ba544a}, intrahash = {bdb52c9c987ebc844885881dbb800635}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 6, pages = {1220-1233}, timestamp = {2024-04-08T10:42:26.000+0200}, title = {Energy-Efficient Design Methodologies: High-Performance VLSI Adders.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc45.html#ZeydelBO10}, volume = 45, year = 2010 }