Inproceedings,
A 0.6 ㎛ Small Pixel for High Resolution CMOS Image Sensor with Full Well Capacity of 10, 000e- by Dual Vertical Transfer Gate Technology.
J. Yun, S. Lee, S. Cha, J. Kim, J. Lee, H. Kim, E. Lee, S. Kim, S. Hong, H. Kim, J. Huh, S. Kim, K. Kakehi, J. Kim, J. Koo, E. Cho, H. Jeong, H. Park, K. Lee, J. Ahn, and J. Yim.VLSI Technology and Circuits, page 351-352. IEEE, (2022)
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- conf/vlsit/YunLCKLKLKHKHKK22
- entry type
- inproceedings
- booktitle
- VLSI Technology and Circuits
- year
- 2022
- pages
- 351-352
- publisher
- IEEE
- crossref
- conf/vlsit/2022
- ee
- https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830254
- isbn
- 978-1-6654-9772-5
- url
- http://dblp.uni-trier.de/db/conf/vlsit/vlsit2022.html#YunLCKLKLKHKHKK22
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%1 conf/vlsit/YunLCKLKLKHKHKK22
%A Yun, Jungbin
%A Lee, Seungjoon
%A Cha, Seungwon
%A Kim, Jihun
%A Lee, Jeongho
%A Kim, Hanseok
%A Lee, Eungkyu
%A Kim, Seonok
%A Hong, Seunghan
%A Kim, Hyungchae
%A Huh, Jinsuk
%A Kim, Sungchul
%A Kakehi, Kazunori
%A Kim, Jae-Ho
%A Koo, June-Mo
%A Cho, Eunsang
%A Jeong, Heegeun
%A Park, Howoo
%A Lee, Kyungho
%A Ahn, JungChak
%A Yim, Joonseo
%B VLSI Technology and Circuits
%D 2022
%I IEEE
%K dblp
%P 351-352
%T A 0.6 ㎛ Small Pixel for High Resolution CMOS Image Sensor with Full Well Capacity of 10, 000e- by Dual Vertical Transfer Gate Technology.
%U http://dblp.uni-trier.de/db/conf/vlsit/vlsit2022.html#YunLCKLKLKHKHKK22
%@ 978-1-6654-9772-5
@inproceedings{conf/vlsit/YunLCKLKLKHKHKK22,
added-at = {2023-07-18T00:00:00.000+0200},
author = {Yun, Jungbin and Lee, Seungjoon and Cha, Seungwon and Kim, Jihun and Lee, Jeongho and Kim, Hanseok and Lee, Eungkyu and Kim, Seonok and Hong, Seunghan and Kim, Hyungchae and Huh, Jinsuk and Kim, Sungchul and Kakehi, Kazunori and Kim, Jae-Ho and Koo, June-Mo and Cho, Eunsang and Jeong, Heegeun and Park, Howoo and Lee, Kyungho and Ahn, JungChak and Yim, Joonseo},
biburl = {https://www.bibsonomy.org/bibtex/2cdd2e7037d00d39936fba040cf76f49a/dblp},
booktitle = {VLSI Technology and Circuits},
crossref = {conf/vlsit/2022},
ee = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830254},
interhash = {a1c94ad2e7e716ea5abb20ef9f650d4f},
intrahash = {cdd2e7037d00d39936fba040cf76f49a},
isbn = {978-1-6654-9772-5},
keywords = {dblp},
pages = {351-352},
publisher = {IEEE},
timestamp = {2024-04-09T19:13:06.000+0200},
title = {A 0.6 ㎛ Small Pixel for High Resolution CMOS Image Sensor with Full Well Capacity of 10, 000e- by Dual Vertical Transfer Gate Technology.},
url = {http://dblp.uni-trier.de/db/conf/vlsit/vlsit2022.html#YunLCKLKLKHKHKK22},
year = 2022
}