%0 Journal Article %1 journals/jssc/LiS03 %A Li, Yunchu %A Sánchez-Sinencio, Edgar %D 2003 %J IEEE J. Solid State Circuits %K dblp %N 8 %P 1405-1410 %T A wide input bandwidth 7-bit 300-MSample/s folding and current-mode interpolating ADC. %U http://dblp.uni-trier.de/db/journals/jssc/jssc38.html#LiS03 %V 38

@article{journals/jssc/LiS03, added-at = {2022-04-20T00:00:00.000+0200}, author = {Li, Yunchu and Sánchez-Sinencio, Edgar}, biburl = {https://www.bibsonomy.org/bibtex/265bdf98c6ae9f33bab50eb0a4b0fcd86/dblp}, ee = {https://doi.org/10.1109/JSSC.2003.814429}, interhash = {ac3579ae7ba1124c4c7d77aeff77edb0}, intrahash = {65bdf98c6ae9f33bab50eb0a4b0fcd86}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 8, pages = {1405-1410}, timestamp = {2024-04-08T10:42:02.000+0200}, title = {A wide input bandwidth 7-bit 300-MSample/s folding and current-mode interpolating ADC.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc38.html#LiS03}, volume = 38, year = 2003 }