%0 Journal Article %1 POSC2005 %A Posch, Werner %A Enichlmair, Hubert %A Schirgi, Eduard %A Rappitsch, Gerhard %D 2005 %I John Wiley & Sons, Ltd. %J Quality and Reliability Engineering International %K CMOS Carlo MOS Monte circuits, electronic extraction, high-voltage mismatch modeling, parameter process, simulation transistor, %N 5 %P 477--489 %R 10.1002/qre.735 %T Statistical modelling of MOS transistor mismatch for high-voltage CMOS processes %U http://dx.doi.org/10.1002/qre.735 %V 21

@article{POSC2005, added-at = {2013-01-07T16:10:56.000+0100}, author = {Posch, Werner and Enichlmair, Hubert and Schirgi, Eduard and Rappitsch, Gerhard}, biburl = {https://www.bibsonomy.org/bibtex/282ee4a5b1cbd1772d47e1e82f2e9b8ff/olivia.bluder}, doi = {10.1002/qre.735}, interhash = {acede2faf9b879060b20bfecd39d9160}, intrahash = {82ee4a5b1cbd1772d47e1e82f2e9b8ff}, issn = {1099-1638}, journal = {Quality and Reliability Engineering International}, keywords = {CMOS Carlo MOS Monte circuits, electronic extraction, high-voltage mismatch modeling, parameter process, simulation transistor,}, number = 5, owner = {bluder}, pages = {477--489}, publisher = {John Wiley \& Sons, Ltd.}, timestamp = {2013-01-07T16:11:10.000+0100}, title = {Statistical modelling of {MOS} transistor mismatch for high-voltage {CMOS} processes}, url = {http://dx.doi.org/10.1002/qre.735}, volume = 21, year = 2005 }