%0 Conference Paper %1 conf/isscc/KhwaCLSYSLCLYC18 %A Khwa, Win-San %A Chen, Jia-Jing %A Li, Jia-Fang %A Si, Xin %A Yang, En-Yu %A Sun, Xiaoyu %A Liu, Rui %A Chen, Pai-Yu %A Li, Qiang %A Yu, Shimeng %A Chang, Meng-Fan %B ISSCC %D 2018 %I IEEE %K dblp %P 496-498 %T A 65nm 4Kb algorithm-dependent computing-in-memory SRAM unit-macro with 2.3ns and 55.8TOPS/W fully parallel product-sum operation for binary DNN edge processors. %U http://dblp.uni-trier.de/db/conf/isscc/isscc2018.html#KhwaCLSYSLCLYC18 %@ 978-1-5090-4940-0

@inproceedings{conf/isscc/KhwaCLSYSLCLYC18, added-at = {2023-07-26T00:00:00.000+0200}, author = {Khwa, Win-San and Chen, Jia-Jing and Li, Jia-Fang and Si, Xin and Yang, En-Yu and Sun, Xiaoyu and Liu, Rui and Chen, Pai-Yu and Li, Qiang and Yu, Shimeng and Chang, Meng-Fan}, biburl = {https://www.bibsonomy.org/bibtex/273b0b56e0070e552b243ff375b455332/dblp}, booktitle = {ISSCC}, crossref = {conf/isscc/2018}, ee = {https://doi.org/10.1109/ISSCC.2018.8310401}, interhash = {b2a18e4095f0dfe68ec778462435864c}, intrahash = {73b0b56e0070e552b243ff375b455332}, isbn = {978-1-5090-4940-0}, keywords = {dblp}, pages = {496-498}, publisher = {IEEE}, timestamp = {2024-04-10T11:03:54.000+0200}, title = {A 65nm 4Kb algorithm-dependent computing-in-memory SRAM unit-macro with 2.3ns and 55.8TOPS/W fully parallel product-sum operation for binary DNN edge processors.}, url = {http://dblp.uni-trier.de/db/conf/isscc/isscc2018.html#KhwaCLSYSLCLYC18}, year = 2018 }