%0 Journal Article %1 journals/jssc/HenzlerGENPBS06 %A Henzler, Stephan %A Georgakos, Georg %A Eireiner, Matthias %A Nirschl, Thomas %A Pacha, Christian %A Berthold, Jörg %A Schmitt-Landsiedel, Doris %D 2006 %J IEEE J. Solid State Circuits %K dblp %N 7 %P 1654-1661 %T Dynamic state-retention flip-flop for fine-grained power gating with small design and power overhead. %U http://dblp.uni-trier.de/db/journals/jssc/jssc41.html#HenzlerGENPBS06 %V 41

@article{journals/jssc/HenzlerGENPBS06, added-at = {2021-10-15T00:00:00.000+0200}, author = {Henzler, Stephan and Georgakos, Georg and Eireiner, Matthias and Nirschl, Thomas and Pacha, Christian and Berthold, Jörg and Schmitt-Landsiedel, Doris}, biburl = {https://www.bibsonomy.org/bibtex/2263cf633caa911ca5e6b1c870e6e6f2d/dblp}, ee = {https://doi.org/10.1109/JSSC.2006.873218}, interhash = {c52cedc97201b0cab50c011ea8974fd5}, intrahash = {263cf633caa911ca5e6b1c870e6e6f2d}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 7, pages = {1654-1661}, timestamp = {2024-04-08T10:42:32.000+0200}, title = {Dynamic state-retention flip-flop for fine-grained power gating with small design and power overhead.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc41.html#HenzlerGENPBS06}, volume = 41, year = 2006 }