%0 Journal Article %1 journals/ejes/BerthelotNH08 %A Berthelot, Florent %A Nouvel, Fabienne %A Houzet, Dominique %D 2008 %J EURASIP J. Embed. Syst. %K dblp %T A Flexible System Level Design Methodology Targeting Run-Time Reconfigurable FPGAs. %U http://dblp.uni-trier.de/db/journals/ejes/ejes2008.html#BerthelotNH08 %V 2008

@article{journals/ejes/BerthelotNH08, added-at = {2020-03-13T00:00:00.000+0100}, author = {Berthelot, Florent and Nouvel, Fabienne and Houzet, Dominique}, biburl = {https://www.bibsonomy.org/bibtex/2b3737210954e5c5bec0d54aac3f1c778/dblp}, ee = {https://doi.org/10.1155/2008/793919}, interhash = {cfb89e840b8ee895a73e07b0f9ac0360}, intrahash = {b3737210954e5c5bec0d54aac3f1c778}, journal = {EURASIP J. Embed. Syst.}, keywords = {dblp}, timestamp = {2020-03-14T11:46:43.000+0100}, title = {A Flexible System Level Design Methodology Targeting Run-Time Reconfigurable FPGAs.}, url = {http://dblp.uni-trier.de/db/journals/ejes/ejes2008.html#BerthelotNH08}, volume = 2008, year = 2008 }