%0 Journal Article %1 journals/tcad/ShonikerOCHRP18 %A Shoniker, Michael %A Oleynikov, Oleg %A Cockburn, Bruce F. %A Han, Jie %A Rana, Manish %A Pedrycz, Witold %D 2018 %J IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. %K dblp %N 6 %P 1312-1316 %T Automatic Selection of Process Corner Simulations for Faster Design Verification. %U http://dblp.uni-trier.de/db/journals/tcad/tcad37.html#ShonikerOCHRP18 %V 37

@article{journals/tcad/ShonikerOCHRP18, added-at = {2020-09-24T00:00:00.000+0200}, author = {Shoniker, Michael and Oleynikov, Oleg and Cockburn, Bruce F. and Han, Jie and Rana, Manish and Pedrycz, Witold}, biburl = {https://www.bibsonomy.org/bibtex/2071fccbccef322484fcc0317d8472e8d/dblp}, ee = {https://doi.org/10.1109/TCAD.2017.2748027}, interhash = {e903a65d4c07f1f8514297ea6312595b}, intrahash = {071fccbccef322484fcc0317d8472e8d}, journal = {IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.}, keywords = {dblp}, number = 6, pages = {1312-1316}, timestamp = {2020-09-25T11:47:27.000+0200}, title = {Automatic Selection of Process Corner Simulations for Faster Design Verification.}, url = {http://dblp.uni-trier.de/db/journals/tcad/tcad37.html#ShonikerOCHRP18}, volume = 37, year = 2018 }