%0 Conference Paper %1 conf/reconfig/ZhouKP17 %A Zhou, Shijie %A Kannan, Rajgopal %A Prasanna, Viktor K. %B ReConFig %D 2017 %I IEEE %K dblp %P 1-7 %T Accelerating low rank matrix completion on FPGA. %U http://dblp.uni-trier.de/db/conf/reconfig/reconfig2017.html#ZhouKP17 %@ 978-1-5386-3797-5

@inproceedings{conf/reconfig/ZhouKP17, added-at = {2020-12-02T00:00:00.000+0100}, author = {Zhou, Shijie and Kannan, Rajgopal and Prasanna, Viktor K.}, biburl = {https://www.bibsonomy.org/bibtex/2e28ce801df87ef9cb5c6e40e9e0b990c/dblp}, booktitle = {ReConFig}, crossref = {conf/reconfig/2017}, ee = {https://doi.org/10.1109/RECONFIG.2017.8279771}, interhash = {e9a5636b6da42948311503cfdd4f794a}, intrahash = {e28ce801df87ef9cb5c6e40e9e0b990c}, isbn = {978-1-5386-3797-5}, keywords = {dblp}, pages = {1-7}, publisher = {IEEE}, timestamp = {2024-04-10T12:17:24.000+0200}, title = {Accelerating low rank matrix completion on FPGA.}, url = {http://dblp.uni-trier.de/db/conf/reconfig/reconfig2017.html#ZhouKP17}, year = 2017 }