Article,

Formal verification of statecharts using finite-state model checkers

, and .
Control Systems Technology, IEEE Transactions on, 14 (5): 943--950 (2006)
DOI: 10.1109/TCST.2006.876921

Abstract

This brief concerns the formal verification of properties of statecharts, a hierarchical state machine formalism for designing control-system logic. Various semantics have been defined for statecharts in terms of the microsteps that determine the transitions between statechart configurations. We show how computation tree logic (CTL) specifications for a statechart can be verified using a finite-state model checker such as SMV. The inputs to the model checker are a model and an associated expansion of the CTL formula that reflect the semantics. A Kripke structure with marked states provides the formal relationship between the expanded model and the original statechart structure and CTL specification. The results apply to a general class of semantics and statecharts with bounded behaviors. The approach is illustrated with a small example.

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