Article,
Spur Reduction Of MB-OFDM UWB System using CMOS Frequency Synthesizer
ACEEE International Journal of Communications, 4 (1): 5 (July 2013)
Abstract
As Technology progress deeper into submicron
CMOS, traditional analog circuits face problems that are
not to be solved purely by analog innovations. Instead,
new architectures are being proposed which take advantages
of the relatively cheaper of the digital circuits to augment or
improve the diminishing performance of the analog
circuitry. The conventional approach performs the design of
14 bands CMOS frequency synthesizers with spur reduction
for MB-OFMD for analog circuits which have high
distortions and noise. My proposed work is to replace the
analog input PLL into All Digital PLL with spur reduction.
Then the frequency mixing architecture alleviates
harmonics mixing and pulling to diminish spur
generation. The simulation is performed using Model SIM
and the implementation using Microwind to diminish spur
reduction.
