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%0 Conference Paper
%1 conf/socc/SuNWSLO17
%A Su, Hong-Yan
%A Nishizawa, Shinichi
%A Wu, Yan-Shiun
%A Shiomi, Jun
%A Li, Yih-Lang
%A Onodera, Hidetoshi
%B SoCC
%D 2017
%E Alioto, Massimo
%E Li, Hai Helen
%E Becker, Jürgen
%E Schlichtmann, Ulf
%E Sridhar, Ramalingam
%I IEEE
%K dblp
%P 56-61
%T Pin accessibility evaluating model for improving routability of VLSI designs.
%U http://dblp.uni-trier.de/db/conf/socc/socc2017.html#SuNWSLO17
%@ 978-1-5386-4034-0
@inproceedings{conf/socc/SuNWSLO17,
added-at = {2017-12-22T00:00:00.000+0100},
author = {Su, Hong-Yan and Nishizawa, Shinichi and Wu, Yan-Shiun and Shiomi, Jun and Li, Yih-Lang and Onodera, Hidetoshi},
biburl = {https://www.bibsonomy.org/bibtex/271a874729dfed66bacef1b645b647550/dblp},
booktitle = {SoCC},
crossref = {conf/socc/2017},
editor = {Alioto, Massimo and Li, Hai Helen and Becker, Jürgen and Schlichtmann, Ulf and Sridhar, Ramalingam},
ee = {https://doi.org/10.1109/SOCC.2017.8226007},
interhash = {f4e5d4b01cb46d7f26e2a6d9f4c2752c},
intrahash = {71a874729dfed66bacef1b645b647550},
isbn = {978-1-5386-4034-0},
keywords = {dblp},
pages = {56-61},
publisher = {IEEE},
timestamp = {2019-07-20T11:39:08.000+0200},
title = {Pin accessibility evaluating model for improving routability of VLSI designs.},
url = {http://dblp.uni-trier.de/db/conf/socc/socc2017.html#SuNWSLO17},
year = 2017
}