%0 Conference Paper %1 conf/vlsit/MittalSPKSMCL23 %A Mittal, Rishabh %A Shibata, Hajime %A Patil, Sharvil %A Krommenhoek, Erik %A Shrestha, Prawal %A Manganaro, Gabriele %A Chandrakasan, Anantha P. %A Lee, Hae-Seung %B VLSI Technology and Circuits %D 2023 %I IEEE %K dblp %P 1-2 %T A 6.4-GS/s 1-GHz BW Continuous-Time Pipelined ADC with Time-Interleaved Sub-ADC-DAC Achieving 61.7-dB SNDR in 16-nm FinFET. %U http://dblp.uni-trier.de/db/conf/vlsit/vlsit2023.html#MittalSPKSMCL23 %@ 978-4-86348-806-9

@inproceedings{conf/vlsit/MittalSPKSMCL23, added-at = {2023-09-30T00:00:00.000+0200}, author = {Mittal, Rishabh and Shibata, Hajime and Patil, Sharvil and Krommenhoek, Erik and Shrestha, Prawal and Manganaro, Gabriele and Chandrakasan, Anantha P. and Lee, Hae-Seung}, biburl = {https://www.bibsonomy.org/bibtex/2368b7c0bd10148f1d628f5b730e06338/dblp}, booktitle = {VLSI Technology and Circuits}, crossref = {conf/vlsit/2023}, ee = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185279}, interhash = {f7c310d9ae0308dd55cc45683bbd21cf}, intrahash = {368b7c0bd10148f1d628f5b730e06338}, isbn = {978-4-86348-806-9}, keywords = {dblp}, pages = {1-2}, publisher = {IEEE}, timestamp = {2024-04-09T19:13:01.000+0200}, title = {A 6.4-GS/s 1-GHz BW Continuous-Time Pipelined ADC with Time-Interleaved Sub-ADC-DAC Achieving 61.7-dB SNDR in 16-nm FinFET.}, url = {http://dblp.uni-trier.de/db/conf/vlsit/vlsit2023.html#MittalSPKSMCL23}, year = 2023 }