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APIR-DSP: An approximate PIR-DSP architecture for error-tolerant applications., , , , , , и . FPT, стр. 1-8. IEEE, (2021)MLBlocks: FPGA Blocks for Machine Learning Applications., , и . FPGA, стр. 228. ACM, (2021)Modified Joint Channel-and-Data Estimation for One-Bit Massive MIMO., , , , , , и . ISCAS, стр. 1-5. IEEE, (2021)MajorityNets: BNNs Utilising Approximate Popcount for Improved Efficiency., , , , , и . FPT, стр. 339-342. IEEE, (2019)LUXOR: An FPGA Logic Cell Architecture for Efficient Compressor Tree Implementations., , , , , и . CoRR, (2020)A Block Minifloat Representation for Training Deep Neural Networks., , , , и . ICLR, OpenReview.net, (2021)PIR-DSP: An FPGA DSP Block Architecture for Multi-precision Deep Neural Networks., , , и . FCCM, стр. 35-44. IEEE, (2019)Applications and Techniques for Fast Machine Learning in Science., , , , , , , , , и 77 other автор(ы). CoRR, (2021)MajorityNets: BNNs Utilising Approximate Popcount for Improved Efficiency., , , , , и . CoRR, (2020)NITI: Training Integer Neural Networks Using Integer-Only Arithmetic., , , и . IEEE Trans. Parallel Distributed Syst., 33 (11): 3249-3261 (2022)