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Designing a 2048-Chiplet, 14336-Core Waferscale Processor.

, , , , , , , , , и . DAC, стр. 1183-1188. IEEE, (2021)

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Michael Pal

Andrea Pál

Pal Dragos

Aprameyo Pal

István Pál

 

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DeepFlow: A Cross-Stack Pathfinding Framework for Distributed AI Systems., , и . ACM Trans. Design Autom. Electr. Syst., 29 (2): 30:1-30:20 (марта 2024)DeepFlow: A Cross-Stack Pathfinding Framework for Distributed AI Systems., , и . CoRR, (2022)Pathfinding for 2.5D interconnect technologies., и . SLIP, стр. 3. ACM, (2020)Advanced Packaging and Heterogeneous Integration to Reboot Computing., , и . ICRC, стр. 1-6. IEEE, (2017)Design Space Exploration for Chiplet-Assembly-Based Processors., , , и . IEEE Trans. Very Large Scale Integr. Syst., 28 (4): 1062-1073 (2020)Hybrid VC-MTJ/CMOS non-volatile stochastic logic for efficient computing., , , , , , , и . DATE, стр. 1438-1443. IEEE, (2017)A Case for Packageless Processors., , , , , и . HPCA, стр. 466-479. IEEE Computer Society, (2018)Architecting Waferscale Processors - A GPU Case Study., , , , , и . HPCA, стр. 250-263. IEEE, (2019)Compression with multi-ECC: enhanced error resiliency for magnetic memories., , и . MEMSYS, стр. 85-100. ACM, (2019)Cable length minimisation in long-reach-PON planning for sparsely populated areas., , , , и . ONDM, стр. 234-239. IEEE, (2014)