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Comparing ternary and binary adders and multipliers.. CoRR, (2019)Ternary circuits: why R=3 is not the Optimal Radix for Computation.. CoRR, (2019)Algorithms and multi-valued circuits for the multioperand addition in the binary stored-carry number system., и . IEEE Symposium on Computer Arithmetic, стр. 194-201. IEEE Computer Society/, (1993)A Communication Architecture for a Massively Parallel Message-Passing Multicomputer., , , и . J. Parallel Distributed Comput., 19 (4): 338-348 (1993)Hardware features of the static communication network of a parallel architecture., , , и . Microprocess. Microprogramming, 38 (1-5): 19-24 (1993)Why M-Valued Circuits are Restricted to a Small Niche.. J. Multiple Valued Log. Soft Comput., 9 (1): 109-123 (2003)Standard Microprocessors Versus Custom Processing Elements for Massively Parallel Architectures., и . PaCT, том 964 из Lecture Notes in Computer Science, стр. 320-325. Springer, (1995)Performance of the NAS Benchmarks on a Cluster of SMP PCs Using a Parallelization of the MPI Programs with OpenMP., , и . PaCT, том 1662 из Lecture Notes in Computer Science, стр. 339-350. Springer, (1999)High Performance SoC Design Using Magnetic Logic and Memory., , , , , , , , , и 2 other автор(ы). VLSI-SoC (Selected Papers), том 379 из IFIP Advances in Information and Communication Technology, стр. 10-33. Springer, (2011)Performance of CMOS Current Mode Full Adders., , и . ISMVL, стр. 27-34. IEEE Computer Society, (1994)