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MrDP: Multiple-Row Detailed Placement of Heterogeneous-Sized Cells for Advanced Nodes., , , , , , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 37 (6): 1237-1250 (2018)Powernet: SOI Lateral Power Device Breakdown Prediction With Deep Neural Networks., , , , , , и . IEEE Access, (2020)Methodology for Standard Cell Compliance and Detailed Placement for Triple Patterning Lithography., , , , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 34 (5): 726-739 (2015)Redundant Local-Loop Insertion for Unidirectional Routing., , , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 36 (7): 1113-1125 (2017)Semisupervised Hotspot Detection With Self-Paced Multitask Learning., , , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39 (7): 1511-1523 (2020)Layout-dependent aging mitigation for critical path timing., , , , , , , и . ASP-DAC, стр. 153-158. IEEE, (2018)The Daktari: An interactive, multi-media tool for knowledge transfer among poor livestock keepers in Kenya., , , и . Comput. Educ., 54 (4): 1241-1247 (2010)DREAMPlace 4.0: Timing-Driven Placement With Momentum-Based Net Weighting and Lagrangian-Based Refinement., , , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 42 (10): 3374-3387 (октября 2023)A GPU-Accelerated Framework for Path-Based Timing Analysis., , , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 42 (11): 4219-4232 (ноября 2023)Subresolution Assist Feature Generation With Supervised Data Learning., , , , , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 37 (6): 1225-1236 (2018)