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Yield Analysis of Logic Circuits.

, , , , , и . VTS, стр. 103-108. IEEE Computer Society, (2004)

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Testability Features of R10000 Microprocessor., , , и . Asian Test Symposium, стр. 108-111. IEEE Computer Society, (1997)Robust switch-level test generation., и . VTS, стр. 107-112. IEEE Computer Society, (1992)Hierarchical Compactor Design for Diagnosis in Deterministic Logic BIST., , , , , и . VTS, стр. 359-365. IEEE Computer Society, (2005)On Selecting Flip-Flops for Partial Reset., , , и . ITC, стр. 1008-1012. IEEE Computer Society, (1993)Yield Analysis of Logic Circuits., , , , , и . VTS, стр. 103-108. IEEE Computer Society, (2004)Modeling the Feedback of AI Price Estimations on Actual Market Values., , , , , и . CoRR, (2024)Accurately Determining Bridging Defects from Layout., , , , , , , , и . DDECS, стр. 87-90. IEEE Computer Society, (2007)DFT & ATPG: Together Again., и . ITC, стр. 262-271. IEEE Computer Society, (1995)FakeFault: a silicon debug software tool for microprocessor embedded memory arrays., , и . ITC, стр. 727-732. IEEE Computer Society, (1998)Augmented partial reset., и . ICCAD, стр. 716-719. IEEE Computer Society / ACM, (1993)