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A class of close-to-optimum adder trees allowing regular and compact layout.

, и . ICCD, стр. 251-254. IEEE Computer Society, (1990)

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A single chip video rate 16×16 discrete cosine transform., , , , и . ICASSP, стр. 805-808. IEEE, (1986)A new VLSI architecture for large kernel real time convolution., , и . ICASSP, стр. 921-924. IEEE, (1990)A VLSI architecture for real-time image convolution with large symmetric kernels., , , и . ICASSP, стр. 1961-1964. IEEE, (1988)Ambient functionnality: human interfaces for the digital life.. sOc-EUSAI, стр. 33. ACM, (2005)I/O bandwidth optimization of VLSI architectures for matrix product-like algorithms., и . ICASSP (1), стр. 353-356. IEEE Computer Society, (1993)A single chip VLSI architecture for a real time stereo vision processor., , , и . ICASSP, стр. 1965-1968. IEEE, (1988)A versatile and powerful chip for real-time motion estimation., и . ICASSP, стр. 2453-2456. IEEE, (1989)A class of close-to-optimum adder trees allowing regular and compact layout., и . ICCD, стр. 251-254. IEEE Computer Society, (1990)An optimized VLSI architecture for a multiformat discrete cosine transform., , , и . ICASSP, стр. 547-550. IEEE, (1987)VDP : A versatile high performance vector distance processor., , и . ICASSP, стр. 369-372. IEEE, (1986)