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Reducing writes in phase-change memory environments by using efficient cache replacement policies.

, , , , и . DATE, стр. 93-96. EDA Consortium San Jose, CA, USA / ACM DL, (2013)

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Pedro Fernando Ramirez Castro

Fernando Augusto de Noronha Castro Pinto

William Castro

Susana Castro

Carlos Castro

 

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Replacing Associative Load Queues: A Timing-Centric Approach., , , , , , , и . IEEE Trans. Computers, 58 (4): 496-511 (2009)Reducing Cache Hierarchy Energy Consumption by Predicting Forwarding and Disabling Associative Sets., , , , , и . J. Circuits Syst. Comput., (2012)Write-Aware Replacement Policies for PCM-Based Systems., , , , , и . Comput. J., 58 (9): 2000-2025 (2015)A Power-Efficient and Scalable Load-Store Queue Design., , , , , и . PATMOS, том 3728 из Lecture Notes in Computer Science, стр. 1-9. Springer, (2005)An OS-Oriented Performance Monitoring Tool for Multicore Systems., , , , , , и . Euro-Par Workshops, том 9523 из Lecture Notes in Computer Science, стр. 697-709. Springer, (2015)OpenIRS-UCM: an open-source multi-platform for interactive response systems., , , , , и . ITiCSE, стр. 232-237. ACM, (2012)PMCTrack: Delivering Performance Monitoring Counter Support to the OS Scheduler., , , , и . Comput. J., 60 (1): 60-85 (2017)Improving the Representativeness of Simulation Intervals for the Cache Memory System., , , , и . CoRR, (2024)A Load-Store Queue Design Based on Predictive State Filtering., , , , , и . J. Low Power Electron., 2 (1): 27-36 (2006)Improving the Representativeness of Simulation Intervals for the Cache Memory System., , , , и . IEEE Access, (2024)