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Cost-efficient of a cluster in a mesh SRAM-based FPGA., , и . IOLTS, стр. 75-80. IEEE, (2014)Special Session: Reliability of Hardware-Implemented Spiking Neural Networks (SNN)., , и . VTS, стр. 1-8. IEEE, (2019)Robustness and Power Efficiency in Spin-Orbit Torque-Based Probabilistic Logic Circuits., , , , и . ISVLSI, стр. 1-6. IEEE, (2023)CSL: Configurable Fault Tolerant Serial Links for Inter-die Communication in 3D Systems., , , и . J. Electron. Test., 28 (1): 137-150 (2012)Workload Impact on BTI HCI Induced Aging of Digital Circuits: A System level Analysis., , , , и . ERMAVSS@DATE, том 1566 из CEUR Workshop Proceedings, стр. 38-40. CEUR-WS.org, (2016)On Using Cell-Aware Methodology for SRAM Bit Cell Testing., , , , , , и . ETS, стр. 1-4. IEEE, (2023)Binary Bayesian Neural Networks for Efficient Uncertainty Estimation Leveraging Inherent Stochasticity of Spintronic Devices., , , , , и . NANOARCH, стр. 11:1-11:6. ACM, (2022)Minimum SRAM Retention Voltage: Insight about optimizing Power Efficiency across Temperature Profile, Process Variation and Aging., , , , , , , и . IOLTS, стр. 1-6. IEEE, (2023)Improving DNN Fault Tolerance in Semantic Segmentation Applications., , и . DFT, стр. 1-6. IEEE, (2022)Spin Orbit Torque-based Crossbar Array for Error Resilient Binary Convolutional Neural Network., , и . LATS, стр. 1-6. IEEE, (2022)