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Symmetry Reduction in SAT-Based Model Checking.

, , , и . CAV, том 3576 из Lecture Notes in Computer Science, стр. 125-138. Springer, (2005)

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Concurrent Test Generation Using Concolic Multi-trace Analysis., , , и . APLAS, том 7705 из Lecture Notes in Computer Science, стр. 239-255. Springer, (2012)Trace-Based Symbolic Analysis for Atomicity Violations., , , и . TACAS, том 6015 из Lecture Notes in Computer Science, стр. 328-342. Springer, (2010)Monotonic Partial Order Reduction: An Optimal Symbolic Partial Order Reduction Technique., , и . CAV, том 5643 из Lecture Notes in Computer Science, стр. 398-413. Springer, (2009)Parametric Circuit Representation Using Inductive Boolean Functions., и . CAV, том 697 из Lecture Notes in Computer Science, стр. 15-28. Springer, (1993)Symmetry Reduction in SAT-Based Model Checking., , , и . CAV, том 3576 из Lecture Notes in Computer Science, стр. 125-138. Springer, (2005)SAT-Based Verification Methods and Applications in Hardware Verification., , и . SFM, том 3965 из Lecture Notes in Computer Science, стр. 108-143. Springer, (2006)Lemma Synthesis for Automating Induction over Algebraic Data Types., , и . CP, том 11802 из Lecture Notes in Computer Science, стр. 600-617. Springer, (2019)Psym: Efficient Symbolic Exploration of Distributed Systems., , и . Proc. ACM Program. Lang., 7 (PLDI): 660-685 (2023)Bitwidth Reduction via Symbolic Interval Analysis for Software Model Checking., , , , , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 27 (8): 1513-1517 (2008)Instruction-Level Abstraction (ILA): A Uniform Specification for System-on-Chip (SoC) Verification., , , , , и . ACM Trans. Design Autom. Electr. Syst., 24 (1): 10:1-10:24 (2019)