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A narrative of UVM testbench environment for interconnection routers: A practical approach., , , , , , , и . IDT, стр. 98-103. IEEE, (2016)Efficient Methodology of Sampling UVM RAL During Simulation for SoC Functional Coverage., и . MTV, стр. 61-66. IEEE, (2018)A reusable verification environment for NoC platforms using UVM., , , , , , , и . EUROCON, стр. 239-242. IEEE, (2017)Coverage Closure Efficient UVM Based Generic Verification Architecture for Flash Memory Controllers., , и . MTV, стр. 30-34. IEEE Computer Society, (2016)A Configurable RISC-V for NoC-Based MPSoCs: A Framework for Hardware Emulation., , , , и . NoCArc@MICRO, стр. 1-6. IEEE Computer Society, (2018)Memory controller architectures: A comparative study., , , и . IDT, стр. 1-6. IEEE, (2013)RVNoC: A Framework for Generating RISC-V NoC-Based MPSoC., , , , , , , и . PDP, стр. 617-621. IEEE Computer Society, (2018)Emulation and verification framework for MPSoC based on NoC and RISC-V., , , , и . Des. Autom. Embed. Syst., 26 (3): 133-159 (декабря 2022)A functional coverage approach for direct testing: An industrial IP as a case study., и . EUROCON, стр. 1-6. IEEE, (2015)Different Reference Models for UVM Environment to Speed Up the Verification Time., , , , , и . MTV, стр. 67-72. IEEE, (2018)