( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
Generating stable and sparse reluctance/inductance matrix under insufficient conditions.

, , и . ASP-DAC, стр. 164-169. IEEE, (2008)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Kwaichiro Asai

Hideki Teshima

Hideki Mine

Yusuke Asai

Hideki Nakamura

 

Другие публикации лиц с тем же именем

New Criteria of Selective Orthogonal Matrix Least-Squares Method for Macromodeling Multiport Networks Characterized by Sampled Data., , , и . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 88-A (2): 524-532 (2005)Acceleration of ADI-FDTD Method by Gauss-Seidel Relaxation Approach., и . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 91-A (2): 550-553 (2008)Neural network simulator for spatiotemporal pattern analysis., , , и . ICECS, стр. 109-112. IEEE, (1998)Network analysis by hierarchical tearing method., и . Syst. Comput. Jpn., 16 (6): 59-67 (1985)Three dimensional module packing by simulated annealing., , и . Congress on Evolutionary Computation, стр. 1069-1074. IEEE, (2005)Behavioral modeling of EM devices by selective orthogonal matrix least-squares method., , , и . ASP-DAC, стр. 184-188. ACM, (2003)Fast timing analysis of plane circuits via two-layer CNN-based modeling., , , , и . ISCAS, IEEE, (2006)Iterated Timing Analysis with Dynamic Partitioning Technique for Bipolar Transistor Circuits., , , и . ISCAS, стр. 411-414. IEEE, (1994)Application of Relaxation-Based Technique to ADI-FDTD Method and Its Estimation., и . ISCAS, стр. 1489-1492. IEEE, (2007)A novel FDTD algorithm based on alternating-direction explicit method with PML absorbing boundary condition., , и . ASP-DAC, стр. 137-141. IEEE, (2010)