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A 0.35V 1.3pJ/cycle 20MHz 8-bit 8-tap FIR core based on wide-pulsed-latch pipelines., , , , и . A-SSCC, стр. 129-132. IEEE, (2016)A fine-grained many VT design methodology for ultra low voltage operations.. ISLPED, стр. 161-166. ACM, (2012)Decoupling capacitor design strategy for minimizing supply noise of ultra low voltage circuits.. DAC, стр. 968-973. ACM, (2012)Cases for Analog Mixed Signal Computing Integrated Circuits for Deep Neural Networks., , , , и . VLSI-DAT, стр. 1-2. IEEE, (2019)MemNet: Memory-Efficiency Guided Neural Architecture Search with Augment-Trim learning., , , , и . CoRR, (2019)A Millimeter-Scale Energy-Autonomous Sensor System With Stacked Battery and Solar Cells., , , , , , , , , и 1 other автор(ы). IEEE J. Solid State Circuits, 48 (3): 801-813 (2013)Exploring Variability and Performance in a Sub-200-mV Processor., , , , , , , , , и 2 other автор(ы). IEEE J. Solid State Circuits, 43 (4): 881-891 (2008)Ultra-Compact and Robust Physically Unclonable Function Based on Voltage-Compensated Proportional-to-Absolute-Temperature Voltage Generators., и . IEEE J. Solid State Circuits, 51 (9): 2192-2202 (2016)C3SRAM: An In-Memory-Computing SRAM Macro Based on Robust Capacitive Coupling Computing Mechanism., , , и . IEEE J. Solid State Circuits, 55 (7): 1888-1897 (2020)Register file circuits and post-deployment framework to monitor aging effects in field., , и . ESSCIRC, стр. 425-428. IEEE, (2016)