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Low-cost prediction-based fault protection strategy., , , и . CGO, стр. 30-42. ACM, (2020)Scratch That (But Cache This): A Hybrid Register Cache/Scratchpad for GPUs., , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 37 (11): 2779-2789 (2018)Sentinel Scheduling for VLIW and Superscalar Processors., , , , , , и . ACM Trans. Comput. Syst., 11 (4): 376-408 (1993)preliminary version: ASPLOS 1992: 238-247.Increasing hardware efficiency with multifunction loop accelerators., , , и . CODES+ISSS, стр. 276-281. ACM, (2006)Embracing heterogeneity with dynamic core boosting., и . Conf. Computing Frontiers, стр. 10:1-10:10. ACM, (2014)Gadara: Dynamic Deadlock Avoidance for Multithreaded Programs., , , , и . OSDI, стр. 281-294. USENIX Association, (2008)StageNet: A Reconfigurable Fabric for Constructing Dependable CMPs., , , и . IEEE Trans. Computers, 60 (1): 5-19 (2011)The Effect of Compiler Optimizations on Available Parallelism in Scalar Programs., , , , и . ICPP (2), стр. 142-145. CRC Press, (1991)Tolerating First Level Memory Access Latency in High-Performance Systems., , и . ICPP (1), стр. 36-43. CRC Press, (1992)Cost-efficient soft error protection for embedded microprocessors., , , и . CASES, стр. 421-431. ACM, (2006)