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Low-Power Embedded DSP Core for Communication Systems., , , , и . EURASIP J. Adv. Signal Process., 2003 (13): 1355-1370 (2003)Low Complexity Formant Estimation Adaptive Feedback Cancellation for Hearing Aids Using Pitch Based Processing., , , , , и . IEEE ACM Trans. Audio Speech Lang. Process., 22 (8): 1248-1259 (2014)A Near-Threshold Cell-Based All-Digital PLL with Hierarchical Band-Selection G-DCO for Fast Lock-In and Low-Power Applications., , и . IEICE Trans. Electron., 98-C (8): 882-891 (2015)A Varactor-Based All-Digital Multi-Phase PLL with Random-Sampling Spur Suppression Techniques., , , , , и . IEICE Trans. Electron., 99-C (4): 481-490 (2016)A high-performance low VMIN 55nm 512Kb disturb-free 8T SRAM with adaptive VVSS control., , , , , , , , , и 9 other автор(ы). SoCC, стр. 197-200. IEEE, (2011)Power and area reduction in multi-stage addition using operand segmentation., , , и . VLSI-DAT, стр. 1-4. IEEE, (2013)Full-digital high throughput design of adaptive decision feedback equalizers using coefficient-lookahead., , , и . ASICON, стр. 1-4. IEEE, (2015)A low-power charge sharing hierarchical bitline and voltage-latched sense amplifier for SRAM macro in 28 nm CMOS technology., , , , , и . SoCC, стр. 160-164. IEEE, (2014)An embedded DSP core for wireless communication., , , , и . ISCAS (4), стр. 524-527. IEEE, (2002)A 12.5 Gbps CMOS input sampler for serial link receiver front end., , и . ISCAS (2), стр. 1055-1058. IEEE, (2005)