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Pixel-based pipeline hardware architecture for high-performance Haar-like feature extraction., , , , , и . APCCAS, стр. 611-612. IEEE, (2016)k Nearest Neighbor Classification Coprocessor with Weighted Clock-Mapping-Based Searching., , , , и . IEICE Trans. Electron., 99-C (3): 397-403 (2016)A Reconfigurable Coprocessor for Simultaneous Localization and Mapping Algorithms in FPGA., , , , , , , и . IEEE Trans. Circuits Syst. II Express Briefs, 70 (1): 286-290 (2023)A Multi-Core Object Detection Coprocessor for Multi-Scale/Type Classification Applicable to IoT Devices., , , , , и . Sensors, 20 (21): 6239 (2020)BESA: Pruning Large Language Models with Blockwise Parameter-Efficient Sparsity Allocation., , , , , , , , и . CoRR, (2024)Post-Processing Refinement for Semi-Global Matching Algorithm Based on Real-Time FPGA., , , , , , и . SOCC, стр. 1-5. IEEE, (2022)A Dynamic Codec with Adaptive Quantization for Convolution Neural Network., , , , и . ASICON, стр. 1-4. IEEE, (2023)A 139 fps pixel-level pipelined binocular stereo vision accelerator with region-optimized semi-global matching., , , , , , , , , и . A-SSCC, стр. 1-3. IEEE, (2021)A Reconfigurable Matrix Multiplication Coprocessor with High Area and Energy Efficiency for Visual Intelligent and Autonomous Mobile Robots., , , , , , , , , и . A-SSCC, стр. 1-3. IEEE, (2021)A Hardware-Efficient Recognition Accelerator Using Haar-Like Feature and SVM Classifier., , , и . IEEE Access, (2019)