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Modeling crosstalk in statistical static timing analysis., , и . DAC, стр. 974-979. ACM, (2008)Efficient Monte Carlo based incremental statistical timing analysis., , и . DAC, стр. 676-681. ACM, (2008)Circuit-aware architectural simulation., , , , , и . DAC, стр. 305-310. ACM, (2004)Non-iterative switching window computation for delay-noise., и . DAC, стр. 390-395. ACM, (2003)21.4 A >78%-efficient light harvester over 100-to-100klux with reconfigurable PV-cell network and MPPT circuit., , , , , и . ISSCC, стр. 370-371. IEEE, (2016)Postroute gate sizing for crosstalk noise reduction., , , , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 23 (12): 1670-1677 (2004)Derivation of signal flow for switch-level simulation., , , и . EURO-DAC, стр. 301-305. IEEE Computer Society, (1990)Design time body bias selection for parametric yield improvement., , , и . ASP-DAC, стр. 681-688. IEEE, (2010)Edge pursuit comparator with application in a 74.1dB SNDR, 20KS/s 15b SAR ADC., , , , , , , , и . ASP-DAC, стр. 295-296. IEEE, (2018)Design and Evaluation of Confidence-Driven Error-Resilient Systems., , , и . IEEE Trans. Very Large Scale Integr. Syst., 22 (8): 1727-1737 (2014)