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Другие публикации лиц с тем же именем

Test Time Analysis for IEEE P1687., , , и . Asian Test Symposium, стр. 455-460. IEEE Computer Society, (2010)Efficient Embedding of Deterministic Test Data., , , , и . Asian Test Symposium, стр. 159-162. IEEE Computer Society, (2010)Access Time Analysis for IEEE P1687., , , и . IEEE Trans. Computers, 61 (10): 1459-1472 (2012)Test Planning for Core-based Integrated Circuits under Power Constraints., , , и . J. Electron. Test., 33 (1): 7-23 (2017)Design automation for IEEE P1687., , , и . DATE, стр. 1412-1417. IEEE, (2011)Variation Aware Analysis of Bridging Fault Testing., , и . ATS, стр. 206-211. IEEE Computer Society, (2008)Scheduling Tests for 3D Stacked Chips under Power Constraints., , и . DELTA, стр. 72-77. IEEE Computer Society, (2011)Evaluation of Level of Confidence and Optimization of Roll-back Recovery with Checkpointing for Real-Time Systems., , , и . Microelectron. Reliab., 54 (5): 1022-1049 (2014)Test Planning for Core-based 3D Stacked ICs with Through-Silicon Vias., , и . VLSI Design, стр. 442-447. IEEE Computer Society, (2012)Test scheduling for modular SOCs in an abort-on-fail environment., , , и . ETS, стр. 8-13. IEEE Computer Society, (2005)