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A Hierarchical Approach to Self-Timed Circuit Verification.

, , , , и . ASYNC, стр. 105-113. IEEE, (2019)

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Другие публикации лиц с тем же именем

Meta Reasoning in ACL2., , , , и . TPHOLs, том 3603 из Lecture Notes in Computer Science, стр. 163-178. Springer, (2005)ACL2 and Its Applications to Digital System Verification., и . Design and Verification of Microprocessor Systems for High-Assurance Applications, Springer, (2010)A formal model of a large memory that supports efficient execution., и . FMCAD, стр. 60-67. IEEE, (2012)Commercial Design Verification: Methodology and Tools., , , , , , , , , и . ITC, стр. 839-848. IEEE Computer Society, (1996)Fourier Series Formalization in ACL2(r)., , и . ACL2, том 192 из EPTCS, стр. 35-51. (2015)An ACL2 Tutorial., и . TPHOLs, том 5170 из Lecture Notes in Computer Science, стр. 17-21. Springer, (2008)Efficient, Verified Checking of Propositional Proofs., , , и . ITP, том 10499 из Lecture Notes in Computer Science, стр. 269-284. Springer, (2017)An Informal Discussion of Issues in Mechanically-Assisted Reasoning.. TPHOLs, стр. 318-337. IEEE Computer Society, (1991)Advances in ACL2 Proof Debugging Tools., и . ACL2, том 393 из EPTCS, стр. 67-81. (2023)Data-Loop-Free Self-Timed Circuit Verification., , , , и . ASYNC, стр. 51-58. IEEE Computer Society, (2018)