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NVMExplorer: A Framework for Cross-Stack Comparisons of Embedded Non-Volatile Memories., , , , , и . HPCA, стр. 938-956. IEEE, (2022)A Scalable Bayesian Inference Accelerator for Unsupervised Learning., , , , , , , и . Hot Chips Symposium, стр. 1-27. IEEE, (2020)A noise-immune sub-threshold circuit design based on selective use of Schmitt-trigger logic., , , , , , и . ACM Great Lakes Symposium on VLSI, стр. 39-44. ACM, (2012)NVMExplorer: A Framework for Cross-Stack Comparisons of Embedded Non-Volatile Memories., , , , , и . CoRR, (2021)A Simulation Framework for Analyzing Transient Effects Due to Thermal Noise in Sub-Threshold Circuits., , , и . ACM Great Lakes Symposium on VLSI, стр. 45-50. ACM, (2015)A 16nm 25mm2 SoC with a 54.5x Flexibility-Efficiency Range from Dual-Core Arm Cortex-A53 to eFPGA and Cache-Coherent Accelerators., , , , , , , , , и . VLSI Circuits, стр. 34-. IEEE, (2019)MaxNVM: Maximizing DNN Storage Density and Inference Efficiency with Sparse Encoding and Error Mitigation., , , , , , и . MICRO, стр. 769-781. ACM, (2019)EdgeBERT: Sentence-Level Energy Optimizations for Latency-Aware Multi-Task NLP Inference., , , , , , , , , и 1 other автор(ы). MICRO, стр. 830-844. ACM, (2021)A 3mm2 Programmable Bayesian Inference Accelerator for Unsupervised Machine Perception using Parallel Gibbs Sampling in 16nm., , , , , , , и . VLSI Circuits, стр. 1-2. IEEE, (2020)9.8 A 25mm2 SoC for IoT Devices with 18ms Noise-Robust Speech-to-Text Latency via Bayesian Speech Denoising and Attention-Based Sequence-to-Sequence DNN Speech Recognition in 16nm FinFET., , , , , , , , , и . ISSCC, стр. 158-160. IEEE, (2021)