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Digitally Assisted On-Chip Body Bias Tuning Scheme for Ultra Low-Power VLSI Systems., , и . IEEE Trans. Circuits Syst. I Regul. Pap., 65-I (10): 3241-3254 (2018)Real Chip Evaluation of a Low Power CGRA with Optimized Application Mapping., , , , , и . HEART, стр. 13:1-13:6. ACM, (2018)Flexible Software-Defined Packet Processing Using Low-Area Hardware., , , , , и . IEEE Access, (2020)A leakage current monitor circuit using silicon on thin BOX MOSFET for dynamic back gate bias control., , и . COOL Chips, стр. 1-3. IEEE Computer Society, (2015)Body bias control for renewable energy source with a high inner resistance., , и . COOL Chips, стр. 1-3. IEEE Computer Society, (2017)7MOPS/lemon-battery image processing demonstration with an ultra-low power reconfigurable accelerator CMA-SOTB-2., , , и . FPL, стр. 1. IEEE, (2015)A 0.5GHz 0.35mW LDO-Powered Constant-Slope Phase Interpolator With 0.22% INL., , , , и . IEEE Trans. Circuits Syst. II Express Briefs, 68 (1): 156-160 (2021)Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC with 2-to-8b DNN Acceleration and 30%-Boost Adaptive Body Biasing., , , , , , , , и . CoRR, (2023)Body Bias Control on a CGRA based on Convex Optimization., , , и . COOL CHIPS, стр. 1-3. IEEE, (2022)Multi-objective Optimization for Application Mapping and Body Bias Control on a CGRA., , , , и . MCSoC, стр. 143-150. IEEE Computer Society, (2017)