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Automatic verification of Pipelined Microprocessor Control.

, и . CAV, том 818 из Lecture Notes in Computer Science, стр. 68-80. Springer, (1994)

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Thomas Burch

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Jerry Ding

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Thomas Burch

 

Другие публикации лиц с тем же именем

Using BDDs to Verify Multipliers.. DAC, стр. 408-412. ACM, (1991)Verifying Liveness Properties by Verifying Safety Properties.. CAV (DIMACS/AMS volume), том 3 из DIMACS Series in Discrete Mathematics and Theoretical Computer Science, стр. 93-102. DIMACS/AMS, (1990)Efficient validity checking for processor verification., , и . ICCAD, стр. 2-6. IEEE Computer Society / ACM, (1995)Linear cofactor relationships in Boolean functions., , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 25 (6): 1011-1023 (2006)Safe BDD Minimization Using Don't Cares., , , и . DAC, стр. 208-213. ACM Press, (1997)Modeling hierarchical combinational circuits., , , и . ICCAD, стр. 612-617. IEEE Computer Society / ACM, (1993)Overcoming Heterophobia: Modeling Concurrency in Heterogeneous Systems., , и . ACSD, стр. 13-. IEEE Computer Society, (2001)Conservative approximations for heterogeneous design., , и . EMSOFT, стр. 155-164. ACM, (2004)Sequential Circuit Verification Using Symbolic Model Checking., , , и . DAC, стр. 46-51. IEEE Computer Society Press, (1990)Detecting support-reducing bound sets using two-cofactor symmetries., , , и . ASP-DAC, стр. 266-271. ACM Press, (2005)