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Другие публикации лиц с тем же именем

Access to streams in multiprocessor systems., , и . PDP, стр. 310-316. IEEE, (1993)Breaking the bandwidth wall in chip multiprocessors., , , и . ICSAMOS, стр. 255-262. IEEE, (2011)Speculative early register release., , , и . Conf. Computing Frontiers, стр. 291-302. ACM, (2006)Novel SRAM bias control circuits for a low power L1 data cache., , , , и . NORCHIP, стр. 1-6. IEEE, (2012)Picos: A hardware runtime architecture support for OmpSs., , , , и . Future Gener. Comput. Syst., (2015)Dynamic Tolerance Region Computing for Multimedia., , и . IEEE Trans. Computers, 61 (5): 650-665 (2012)A performance evaluation of the multiple bus network for multiprocessor systems., , , , и . SIGMETRICS, стр. 200-206. ACM, (1983)Automatic generation of loop scheduling for VLIW., , , и . PACT, стр. 306-309. IFIP Working Group on Algol / ACM, (1995)Runtime-assisted cache coherence deactivation in task parallel programs., , , , и . SC, стр. 35:1-35:12. IEEE / ACM, (2018)Parallel Computer Architecture., , , и . Euro-Par, том 1900 из Lecture Notes in Computer Science, стр. 537-538. Springer, (2000)