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A 1-V multithreshold-voltage CMOS digital signal processor for mobile phone application.

, , , , , и . IEEE J. Solid State Circuits, 31 (11): 1795-1802 (1996)

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Satoshi Ejima

Satoshi Okawa

Satoshi Otomo

Satoshi Murayama

Satoshi Nishida

 

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A pixel-level automatic calibration circuit scheme for capacitive fingerprint sensor LSIs., , , , и . IEEE J. Solid State Circuits, 37 (10): 1300-1306 (2002)A 1-V multithreshold-voltage CMOS digital signal processor for mobile phone application., , , , , и . IEEE J. Solid State Circuits, 31 (11): 1795-1802 (1996)A 1-V high-speed MTCMOS circuit scheme for power-down application circuits., , , , и . IEEE J. Solid State Circuits, 32 (6): 861-869 (1997)A novel DBA scheme for TDM-PON based mobile fronthaul., , , , , , и . OFC, стр. 1-3. IEEE, (2014)Fingerprint Image Enhancement by Pixel-Parallel Processing., , , , , , , и . ICPR (3), стр. 752-755. IEEE Computer Society, (2002)5G R&D Activities for High Capacity Technologies with Ultra High-Density Multi-Band and Multi-Access Layered Cells., , , , , , , , , и 2 other автор(ы). VTC Spring, стр. 1-5. IEEE, (2019)A 100-MHz 51.2-Gb/s packet lookup engine LSI based on missmatch detection circuit combined with linked-list hash table., , , , , и . ISPACS, стр. 351-356. IEEE, (2015)1-V power supply high-speed digital circuit technology with multithreshold-voltage CMOS., , , , , и . IEEE J. Solid State Circuits, 30 (8): 847-854 (августа 1995)Logic and Analog Test Schemes for a Single-Chip Pixel-Parallel Fingerprint Identification LSI., , , , , , , и . IEICE Trans. Electron., 90-C (10): 1892-1899 (2007)A shared-bitline SRAM cell architecture for 1-V ultra low-power word-bit configurable macrocells., , и . ISLPED, стр. 12-17. ACM, (1999)