From post

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

 

Другие публикации лиц с тем же именем

A two-port SRAM using a single-port cell array with a self-timed write-after-read control scheme to save 47% area & 63% standby power., , , , , , , , , и 1 other автор(ы). ASICON, стр. 426-428. IEEE, (2017)A 135 GBps/Gbit 0.66 pJ/bit Stacked Embedded DRAM with Multilayer Arrays by Fine Pitch Hybrid Bonding and Mini-TSV., , , , , , , , , и 8 other автор(ы). VLSI Technology and Circuits, стр. 1-2. IEEE, (2023)Logic-DRAM Co-Design to Exploit the Efficient Repair Technique for Stacked DRAM., , , , , и . IEEE Trans. Circuits Syst. I Regul. Pap., 62-I (5): 1362-1371 (2015)184QPS/W 64Mb/mm23D Logic-to-DRAM Hybrid Bonding with Process-Near-Memory Engine for Recommendation System., , , , , , , , , и 9 other автор(ы). ISSCC, стр. 1-3. IEEE, (2022)Low Overhead Pilot Design for Channel Estimation in MIMO-OTFS Systems., , , и . ICCC Workshops, стр. 1-6. IEEE, (2023)A 1596GB/s 48Gb Embedded DRAM 384-Core SoC with Hybrid Bonding Integration., , , , , , , , , и . A-SSCC, стр. 1-3. IEEE, (2021)A 0.13μm 64Mb HfOx ReRAM using configurable ramped voltage write and low read-disturb sensing techniques for reliability improvement., , , , , , , , , и 15 other автор(ы). CICC, стр. 1-4. IEEE, (2017)