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Enabling Efficient Dynamic Resizing of Large DRAM Caches via A Hardware Consistent Hashing Mechanism., , , , , , , , и . CoRR, (2016)SlimSLAM: An Adaptive Runtime for Visual-Inertial Simultaneous Localization and Mapping., , , , , и . ASPLOS (3), стр. 900-915. ACM, (2024)A-DRM: Architecture-aware Distributed Resource Management of Virtualized Clusters., , , , , и . VEE, стр. 93-106. ACM, (2015)GenASM: A High-Performance, Low-Power Approximate String Matching Acceleration Framework for Genome Sequence Analysis., , , , , , , , , и 6 other автор(ы). MICRO, стр. 951-966. IEEE, (2020)Tiered-latency DRAM: A low latency and low cost DRAM architecture., , , , , и . HPCA, стр. 615-626. IEEE Computer Society, (2013)DASH: Deadline-Aware High-Performance Memory Scheduler for Heterogeneous Systems with Hardware Accelerators., , , и . ACM Trans. Archit. Code Optim., 12 (4): 65:1-65:28 (2016)GrandSLAm: Guaranteeing SLAs for Jobs in Microservices Execution Frameworks., , , , , и . EuroSys, стр. 34:1-34:16. ACM, (2019)BLISS: Balancing Performance, Fairness and Complexity in Memory Access Scheduling., , , , и . IEEE Trans. Parallel Distributed Syst., 27 (10): 3071-3087 (2016)MISE: Providing performance predictability and improving fairness in shared main memory systems., , , , и . HPCA, стр. 639-650. IEEE Computer Society, (2013)Design-Induced Latency Variation in Modern DRAM Chips: Characterization, Analysis, and Latency Reduction Mechanisms., , , , , , , и . SIGMETRICS (Abstracts), стр. 54. ACM, (2017)