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Другие публикации лиц с тем же именем

Secure Design Flow of FPGA Based RISC-V Implementation., , , , , и . IVSW, стр. 37-42. IEEE, (2019)Dynamic Key Updates for LUT Locked Design., , , , , и . HOST, стр. 105-108. IEEE, (2022)Multilayer Camouflaged Secure Boot for SoCs., , , , , , и . MTV, стр. 56-61. IEEE, (2019)ASIC implementation of a hardware-embedded physical unclonable function., , , и . IET Comput. Digit. Tech., 8 (6): 288-299 (2014)A Survey and Analysis on SoC Platform Security in ARM, Intel and RISC-V Architecture., , и . MWSCAS, стр. 718-721. IEEE, (2020)A Delay-Based Machine Learning Model for DMA Attack Mitigation., , , и . Cryptogr., 5 (3): 18 (2021)GDS-II Trojan detection using multiple supply pad VDD and GND IDDQs in ASIC functional units., , и . HOST, стр. 144-150. IEEE Computer Society, (2015)PUF-Based Authentication., , и . ICCAD, стр. 337-344. IEEE, (2015)Analysis of Entropy in a Hardware-Embedded Delay PUF., , , , и . Cryptogr., 1 (1): 8 (2017)Poster: Hardware based security enhanced framework for automotives., , , и . VNC, стр. 1-2. IEEE, (2016)