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Compile-time area estimation for LUT-based FPGAs., , , и . ACM Trans. Design Autom. Electr. Syst., 11 (1): 104-122 (2006)Compiled hardware acceleration of Molecular Dynamics code., и . FPL, стр. 667-670. IEEE, (2008)Reconfigurable Computing in the New Age of Parallelism., и . SAMOS, том 5657 из Lecture Notes in Computer Science, стр. 255-262. Springer, (2009)An evaluation of medium-grain dataflow code., , и . Int. J. Parallel Program., 22 (3): 209-242 (1994)A highly configurable cache for low energy embedded systems., , и . ACM Trans. Embed. Comput. Syst., 4 (2): 363-387 (2005)GPU Accelerated Top-K Selection With Efficient Early Stopping., , и . ADMS@VLDB, стр. 10-21. (2019)Conditional Disconnection Probability in Star Graphs., и . VLSI Design, 1 (1): 61-70 (1993)Cameron: High level Language Compilation for Reconfigurable Systems., , , , , и . IEEE PACT, стр. 236-244. IEEE Computer Society, (1999)Preliminary Evaluation of a Hybrid Deterministic/Adaptive Router., и . PCRCW, том 1417 из Lecture Notes in Computer Science, стр. 89-102. Springer, (1997)Accelerating In-Memory Database Selections Using Latency Masking Hardware Threads., , , , , и . ACM Trans. Archit. Code Optim., 16 (2): 13:1-13:28 (2019)