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A 0.5-degree error 10mW CMOS image sensor-based gaze estimation processor with logarithmic processing., , , и . VLSIC, стр. 46-. IEEE, (2015)14.6 A 0.62mW ultra-low-power convolutional-neural-network face-recognition processor and a CIS integrated with always-on haar-like face detector., , , , , и . ISSCC, стр. 248-249. IEEE, (2017)An Augmented Reality Processor with a Congestion-Aware Network-on-Chip Scheduler., , , , , , , и . IEEE Micro, 34 (6): 31-41 (2014)A 24 μW 38.51 mΩrms resolution bio-impedance sensor with dual path instrumentation amplifier., , , , , , , и . ESSCIRC, стр. 223-226. IEEE, (2017)4.6 A1.93TOPS/W scalable deep learning/inference processor with tetra-parallel MIMD architecture for big-data applications., , , , , и . ISSCC, стр. 1-3. IEEE, (2015)Low-Power Scalable 3-D Face Frontalization Processor for CNN-Based Face Recognition in Mobile Devices., , , , , и . IEEE J. Emerg. Sel. Topics Circuits Syst., 8 (4): 873-883 (2018)A 590MDE/s semi-global matching processor with lossless data compression., , и . SoCC, стр. 18-22. IEEE, (2017)CNNP-v2: An Energy Efficient Memory-Centric Convolutional Neural Network Processor Architecture., , , и . AICAS, стр. 38-41. IEEE, (2019)18.1 A 2.71nJ/pixel 3D-stacked gaze-activated object-recognition system for low-power mobile HMD applications., , , , , , и . ISSCC, стр. 1-3. IEEE, (2015)A task-level pipelined many-SIMD augmented reality processor with congestion-aware network-on-chip scheduler., , , , , , , , , и . COOL Chips, стр. 1-3. IEEE Computer Society, (2014)