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Effective Pre-Silicon Verification of Processor Cores by Breaking the Bounds of Symbolic Quick Error Detection., , , , , , , , и . CoRR, (2021)Design of a Tightly-Coupled RISC-V Physical Memory Protection Unit for Online Error Detection., , , , , , и . VLSI-SoC, стр. 1-6. IEEE, (2022)A property language for the specification of hardware-dependent embedded system software., , , , и . FDL, стр. 1-8. IEEE, (2014)Automatic State Space Analysis for Modeling Untrusted Embedded Device Drivers., , , и . DSD, стр. 109-116. IEEE, (2020)Area Estimation Framework for Digital Hardware Design using Machine Learning., , , , , и . MBMV, стр. 1-10. VDE / IEEE, (2020)Systematic RISC-V based Firmware Design⋆., , , , , , , , , и . FDL, стр. 1-8. IEEE, (2019)STABLE: A new QF-BV SMT solver for hard verification problems combining Boolean reasoning with computer algebra., , , , , , и . DATE, стр. 155-160. IEEE, (2011)Layout Driven Optimization of Datapath Circuits using Arithmetic Reasoning., , , , и . ICCD, стр. 350-353. IEEE Computer Society, (2004)Accelerating Retiming Under the Coupled-Edge Timing Model., , и . ISVLSI, стр. 135-140. IEEE Computer Society, (2002)goSAT: Floating-point satisfiability as global optimization., , и . FMCAD, стр. 11-14. IEEE, (2017)