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Early-Stage Power Grid Design: Extraction, Modeling and Optimization., , и . DAC, стр. 79:1-79:6. ACM, (2014)A zonotoped macromodeling for reachability verification of eye-diagram in high-speed I/O links with jitter., , , и . ICCAD, стр. 696-701. IEEE, (2014)Run-time demand estimation and modulation of on-chip decaps at system level for leakage power reduction in multicore chips., , и . Integr., (2019)Boosting Uppaal for OSEK/VDX Applications with a Sequentialization Approach., , , и . SOFL+MSVL, том 10795 из Lecture Notes in Computer Science, стр. 51-68. Springer, (2017)Local-to-global spatial learning for whole-slide image representation and classification., , , , , , и . Comput. Medical Imaging Graph., (2023)Novel Through-Silicon-Via Inductor-Based On-Chip DC-DC Converter Designs in 3D ICs., , и . ACM J. Emerg. Technol. Comput. Syst., 11 (2): 16:1-16:14 (2014)A Reconfigurable Multiplier for Signed Multiplications with Asymmetric Bit-Widths., , , , , , , и . ACM J. Emerg. Technol. Comput. Syst., 17 (4): 48:1-48:16 (2021)A Multi-Level-Optimization Framework for FPGA-Based Cellular Neural Network Implementation., , , , и . ACM J. Emerg. Technol. Comput. Syst., 14 (4): 47:1-47:17 (2018)Design of Ultracompact Content Addressable Memory Exploiting 1T-1MTJ Cell., , , , , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 42 (5): 1450-1462 (мая 2023)A Fast Method to Estimate Through-Bump Current for Power Delivery Verification., и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 42 (5): 1643-1647 (мая 2023)