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A computational model for SAT-based verification of hardware-dependent low-level embedded system software.

, , , , , и . ASP-DAC, стр. 711-716. IEEE, (2013)

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Wolfgang Kunz

Wolfgang Kunz

Wolfgang Kunz

Wolfgang Kunz

Wolfgang Kunz

 

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Reasoning in Boolean Networks - Logic Synthesis and Verification Using Testing Techniques., и . Frontiers in electronic testing Springer, (1997)goSAT: Floating-point satisfiability as global optimization., , и . FMCAD, стр. 11-14. IEEE, (2017)Accelerated dynamic learning for test pattern generation in combinational circuits., и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 12 (5): 684-694 (1993)Automatic State Space Analysis for Modeling Untrusted Embedded Device Drivers., , , и . DSD, стр. 109-116. IEEE, (2020)A New Formal Verification Approach for Hardware-dependent Embedded System Software., , , , , , , и . IPSJ Trans. Syst. LSI Des. Methodol., (2013)The European Masters in Embedded Computing Systems (EMECS)., , , и . EWME, стр. 1-6. IEEE, (2016)A computer-algebraic approach to formal verification of data-centric low-level software., , , и . MEMOCODE, стр. 34-42. IEEE, (2016)A Scalable Formal Verification Methodology for Data-Oblivious Hardware., , , , и . CoRR, (2023)Effective Pre-Silicon Verification of Processor Cores by Breaking the Bounds of Symbolic Quick Error Detection., , , , , , , , и . CoRR, (2021)Area Estimation Framework for Digital Hardware Design using Machine Learning., , , , , и . MBMV, стр. 1-10. VDE / IEEE, (2020)