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Fault Testing for Reversible Circuits.

, , и . VTS, стр. 410-416. IEEE Computer Society, (2003)

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Matthew John Hayes

John P Burrows

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John P Broussard

John P Teschke

 

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CLIP: An Optimizing Layout Generator for Two-Dimensional CMOS Cells., и . DAC, стр. 452-455. ACM Press, (1997)Test-Set Preserving Logic Transformations., и . DAC, стр. 454-458. IEEE Computer Society Press, (1992)An Array Layout Methodology for VLlSI Circuits., и . IEEE Trans. Computers, 35 (12): 1055-1067 (1986)Structural fault tolerance in VLSI-based systems., и . Great Lakes Symposium on VLSI, стр. 50-55. IEEE, (1994)A Nand Model ror Fault Diagnosis in Combinational Logic Networks.. IEEE Trans. Computers, 20 (12): 1496-1506 (1971)On-line sensing for healthier FPGA systems., и . FPGA, стр. 239-248. ACM, (2010)On the Role of Sequential Circuits in Stochastic Computing., и . ACM Great Lakes Symposium on VLSI, стр. 475-478. ACM, (2017)On the role of timing masking in reliable logic circuit design., , и . DAC, стр. 924-929. ACM, (2008)Introduction to stochastic computing and its challenges.. DAC, стр. 59:1-59:3. ACM, (2015)Some Practical Issues in the Design of Fault-Tolerant Multiprocessors., и . FTCS, стр. 292-299. IEEE Computer Society, (1991)