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A 0.2-to-2MHz BW, 50-to-86dB SNDR, 16-to-22mW flexible 4th-order ΣΔ modulator with DC-to-44MHz tunable center frequency in 1.2-V 90-nm CMOS., , и . VLSI-SoC, стр. 47-52. IEEE, (2012)Hybrid continuous-time/discrete-time circuit techniques for the efficient implementation of wideband ΣΔ ADCs., и . MWSCAS, стр. 374-377. IEEE, (2012)Implementation of Binary Stochastic STDP Learning Using Chalcogenide-Based Memristive Devices., , , , и . ISCAS, стр. 1-5. IEEE, (2021)Lessons Learned the Hard Way., , , , , , , , , и 23 other автор(ы). ISCAS, стр. 1-18. IEEE, (2020)Design of a 1.2-V 130nm CMOS 13-bit@40MS/s Cascade 2-2-1 Continuous-Time Sigma-Delta Modulator., , , , и . VLSI-SoC, стр. 267-271. IEEE, (2006)Effect of non-linear settling error on the harmonic distortion of fully-differential switched-current bandpass Sigma-Delta modulators., , , , и . ISCAS (1), стр. 340-343. IEEE, (2001)A SIMULINK Block Set for the High-Level Simulation of Multistandard Radio Receivers., , и . ISCAS, стр. 2950-2953. IEEE, (2007)Design considerations and experimental results of continuously-tuned reconfigurable CMOS LNAs., , и . ISCAS, стр. 273-276. IEEE, (2011)Bulk-Input VCO-Based Sigma-Delta ADCs with Enhanced Linearity in 28-nm FD-SOI CMOS., и . ISCAS, стр. 1-5. IEEE, (2019)Behavioral Modeling of SAR ADCs in Simulink., , , , и . ISCAS, стр. 1-5. IEEE, (2018)